PPC: Add build rules for PPC interpreter (non-functional, yet).
This commit is contained in:
Mike Pall
@@ -10,10 +10,6 @@
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|.globalnames globnames
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|.externnames extnames
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|.if not SPE
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|.error "No support for plain PowerPC CPUs (yet)"
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|.endif
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|// Note: The ragged indentation of the instructions is intentional.
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|// The starting columns indicate data dependencies.
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@@ -32,14 +28,12 @@
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|// Constants for vectorized type-comparisons (hi+low GPR). C callee-save.
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|.define TISNUM, r22
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|.if SPE
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|.define TISSTR, r23
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|.define TISTAB, r24
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|.define TISFUNC, r25
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|.define TISNIL, r26
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|.define TOBIT, r27
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|.define ZERO, TOBIT // Zero in lo word.
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|.endif
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|.define TISNIL, r23
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|.define ZERO, r24
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|.define TISSTR, r25 // NYI: remove.
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|.define TISTAB, r26 // NYI: remove.
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|.define TISFUNC, r27 // NYI: remove.
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|.define TOBIT, r28 // NYI: use FP reg.
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|// The following temporaries are not saved across C calls, except for RA.
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|.define RA, r20 // Callee-save.
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@@ -63,32 +57,19 @@
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|.define CARG4, r6 // Overlaps TMP3.
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|.define CARG5, r7 // Overlaps INS.
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|.define CARGF1, f1
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|.define CARGF2, f2
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|.define CRET1, r3
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|.define CRET2, r4
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|// Stack layout while in interpreter. Must match with lj_frame.h.
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|.if SPE
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|.define SAVE_LR, 180(sp)
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|.define CFRAME_SPACE, 176 // Delta for sp.
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|// Back chain for sp: 176(sp) <-- sp entering interpreter
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|.define SAVE_r31, 168(sp) // 64 bit register saves.
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|.define SAVE_r30, 160(sp)
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|.define SAVE_r29, 152(sp)
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|.define SAVE_r28, 144(sp)
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|.define SAVE_r27, 136(sp)
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|.define SAVE_r26, 128(sp)
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|.define SAVE_r25, 120(sp)
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|.define SAVE_r24, 112(sp)
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|.define SAVE_r23, 104(sp)
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|.define SAVE_r22, 96(sp)
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|.define SAVE_r21, 88(sp)
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|.define SAVE_r20, 80(sp)
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|.define SAVE_r19, 72(sp)
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|.define SAVE_r18, 64(sp)
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|.define SAVE_r17, 56(sp)
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|.define SAVE_r16, 48(sp)
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|.define SAVE_r15, 40(sp)
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|.define SAVE_r14, 32(sp)
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|.define SAVE_LR, 260(sp)
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|.define CFRAME_SPACE, 256 // Delta for sp.
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|// Back chain for sp: 256(sp) <-- sp entering interpreter
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|.define SAVE_GPR_, 184 // .. 184+18*4: 32 bit GPR saves.
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|.define SAVE_FPR_, 40 // .. 40+18*8: 64 bit FPR saves.
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|.define SAVE_UNUSED, 32(sp) // 8 unused bytes for alignment.
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|.define SAVE_ERRF, 28(sp) // 32 bit C frame info.
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|.define SAVE_NRES, 24(sp)
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|.define SAVE_CFRAME, 20(sp)
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@@ -98,25 +79,30 @@
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|// Next frame lr: 4(sp)
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|// Back chain for sp: 0(sp) <-- sp while in interpreter
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|.macro save_, reg; evstdd reg, SAVE_..reg; .endmacro
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|.macro rest_, reg; evldd reg, SAVE_..reg; .endmacro
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|.endif
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|.macro save_, reg
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| stw r..reg, SAVE_GPR_+(reg-14)*4(sp)
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| stfd f..reg, SAVE_FPR_+(reg-14)*8(sp)
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|.endmacro
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|.macro rest_, reg
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| lwz r..reg, SAVE_GPR_+(reg-14)*4(sp)
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| lfd f..reg, SAVE_FPR_+(reg-14)*8(sp)
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|.endmacro
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|.macro saveregs
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| stwu sp, -CFRAME_SPACE(sp)
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| save_ r14; save_ r15; save_ r16; save_ r17; save_ r18; save_ r19
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| save_ 14; save_ 15; save_ 16; save_ 17; save_ 18; save_ 19
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| mflr r0
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| save_ r20; save_ r21; save_ r22; save_ r23; save_ r24; save_ r25
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| save_ 20; save_ 21; save_ 22; save_ 23; save_ 24; save_ 25
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| stw r0, SAVE_LR
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| save_ r26; save_ r27; save_ r28; save_ r29; save_ r30; save_ r31
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| save_ 26; save_ 27; save_ 28; save_ 29; save_ 30; save_ 31
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|.endmacro
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|.macro restoreregs
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| lwz r0, SAVE_LR
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| rest_ r14; rest_ r15; rest_ r16; rest_ r17; rest_ r18; rest_ r19
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| rest_ 14; rest_ 15; rest_ 16; rest_ 17; rest_ 18; rest_ 19
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| mtlr r0
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| rest_ r20; rest_ r21; rest_ r22; rest_ r23; rest_ r24; rest_ r25
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| rest_ r26; rest_ r27; rest_ r28; rest_ r29; rest_ r30; rest_ r31
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| rest_ 20; rest_ 21; rest_ 22; rest_ 23; rest_ 24; rest_ 25
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| rest_ 26; rest_ 27; rest_ 28; rest_ 29; rest_ 30; rest_ 31
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| addi sp, sp, CFRAME_SPACE
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|.endmacro
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@@ -231,17 +217,15 @@
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|//-----------------------------------------------------------------------
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|// Macros to test operand types.
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|.if SPE
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|.macro checknum, reg; evcmpltu reg, TISNUM; .endmacro
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|.macro checkstr, reg; evcmpeq reg, TISSTR; .endmacro
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|.macro checktab, reg; evcmpeq reg, TISTAB; .endmacro
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|.macro checkfunc, reg; evcmpeq reg, TISFUNC; .endmacro
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|.macro checknil, reg; evcmpeq reg, TISNIL; .endmacro
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|.macro checkok, label; blt label; .endmacro
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|.macro checkfail, label; bge label; .endmacro
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|.macro checkanyfail, label; bns label; .endmacro
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|.macro checkallok, label; bso label; .endmacro
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|.endif
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|.macro checknum, reg; cmplw reg, TISNUM; .endmacro
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|.macro checkstr, reg; cmpwi reg, LJ_TSTR; .endmacro
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|.macro checktab, reg; cmpwi reg, LJ_TTAB; .endmacro
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|.macro checkfunc, reg; cmpwi reg, LJ_TFUNC; .endmacro
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|.macro checknil, reg; cmpwi reg, LJ_TNIL; .endmacro
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|.macro checkok, label; beq label; .endmacro // NYI: remove.
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|.macro checkfail, label; bne label; .endmacro // NYI: remove.
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|.macro checkanyfail, label; bns label; .endmacro // NYI: remove.
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|.macro checkallok, label; bso label; .endmacro // NYI: remove.
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|.macro branch_RD
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| srwi TMP0, RD, 1
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@@ -1067,11 +1051,7 @@ static void build_subroutines(BuildCtx *ctx)
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| checknum CARG1
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| cmplwi cr1, TMP0, 0
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| stw BASE, L->base // Add frame since C call can throw.
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|.if SPE
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| crand 4*cr0+eq, 4*cr0+lt, 4*cr1+eq
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|.else
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|.error "NYI"
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|.endif
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| crand 4*cr0+eq, 4*cr0+eq, 4*cr1+eq
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| stw PC, SAVE_PC // Redundant (but a defined value).
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| bne ->fff_fallback
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| ffgccheck
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@@ -3672,14 +3652,10 @@ static void emit_asm_debug(BuildCtx *ctx)
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"\t.byte 0x11\n\t.uleb128 65\n\t.sleb128 -1\n",
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(int)ctx->codesz, CFRAME_SIZE);
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for (i = 14; i <= 31; i++)
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#if LJ_TARGET_PPCSPE
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fprintf(ctx->fp,
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"\t.byte %d\n\t.uleb128 %d\n"
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"\t.byte 5\n\t.uleb128 %d\n\t.uleb128 %d\n",
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0x80+i, 1+2*(31-i), 1200+i, 2+2*(31-i));
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#else
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#error "missing frame info for saved registers"
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#endif
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"\t.byte %d\n\t.uleb128 %d\n",
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0x80+i, 37+(31-i), 0x80+32+i, 2+2*(31-i));
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fprintf(ctx->fp,
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"\t.align 2\n"
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".LEFDE0:\n\n");
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@@ -3713,14 +3689,10 @@ static void emit_asm_debug(BuildCtx *ctx)
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"\t.byte 0x11\n\t.uleb128 65\n\t.sleb128 -1\n",
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(int)ctx->codesz, CFRAME_SIZE);
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for (i = 14; i <= 31; i++)
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#if LJ_TARGET_PPCSPE
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fprintf(ctx->fp,
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"\t.byte %d\n\t.uleb128 %d\n"
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"\t.byte 5\n\t.uleb128 %d\n\t.uleb128 %d\n",
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0x80+i, 1+2*(31-i), 1200+i, 2+2*(31-i));
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#else
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#error "missing frame info for saved registers"
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#endif
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"\t.byte %d\n\t.uleb128 %d\n",
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0x80+i, 37+(31-i), 0x80+32+i, 2+2*(31-i));
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fprintf(ctx->fp,
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"\t.align 2\n"
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".LEFDE1:\n\n");
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