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MIPS64: Avoid unaligned load in lj_vm_exit_interp.

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Thanks to Sergey Kaplun. #1428
This commit is contained in:
Mike Pall
2026-02-11 23:06:36 +01:00
parent d459c6ce50
commit 2aec641e01
1 changed files with 5 additions and 4 deletions
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9
src/vm_mips64.dasc
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@@ -2582,9 +2582,8 @@ static void build_subroutines(BuildCtx *ctx)
| li TISNIL, LJ_TNIL | li TISNIL, LJ_TNIL
| li TISNUM, LJ_TISNUM // Setup type comparison constants. | li TISNUM, LJ_TISNUM // Setup type comparison constants.
| .FPU mtc1 TMP3, TOBIT | .FPU mtc1 TMP3, TOBIT
| ld TMP1, LFUNC:RB->pc | ld TMP3, LFUNC:RB->pc
| sd r0, DISPATCH_GL(jit_base)(DISPATCH) | sd r0, DISPATCH_GL(jit_base)(DISPATCH)
| ld KBASE, PC2PROTO(k)(TMP1)
| .FPU cvt.d.s TOBIT, TOBIT | .FPU cvt.d.s TOBIT, TOBIT
| // Modified copy of ins_next which handles function header dispatch, too. | // Modified copy of ins_next which handles function header dispatch, too.
| lw INS, 0(PC) | lw INS, 0(PC)
@@ -2602,6 +2601,7 @@ static void build_subroutines(BuildCtx *ctx)
| decode_RA8a RA, INS | decode_RA8a RA, INS
| beqz TMP2, >2 | beqz TMP2, >2
|. decode_RA8b RA |. decode_RA8b RA
| ld KBASE, PC2PROTO(k)(TMP3)
| jr AT | jr AT
|. decode_RD8b RD |. decode_RD8b RD
|2: |2:
@@ -2619,8 +2619,8 @@ static void build_subroutines(BuildCtx *ctx)
| dsubu TMP1, BASE, TMP0 | dsubu TMP1, BASE, TMP0
| ld LFUNC:TMP2, -32(TMP1) | ld LFUNC:TMP2, -32(TMP1)
| cleartp LFUNC:TMP2 | cleartp LFUNC:TMP2
| ld TMP1, LFUNC:TMP2->pc | ld TMP3, LFUNC:TMP2->pc
| ld KBASE, PC2PROTO(k)(TMP1) | ld KBASE, PC2PROTO(k)(TMP3)
|3: |3:
| daddiu RC, MULTRES, -8 | daddiu RC, MULTRES, -8
| jr AT | jr AT
@@ -2639,6 +2639,7 @@ static void build_subroutines(BuildCtx *ctx)
| ld AT, GG_DISP2STATIC(TMP0) | ld AT, GG_DISP2STATIC(TMP0)
| decode_RA8a RA, INS | decode_RA8a RA, INS
| decode_RD8b RD | decode_RD8b RD
| ld KBASE, PC2PROTO(k)(TMP3)
| jr AT | jr AT
|. decode_RA8b RA |. decode_RA8b RA
| |