ARM, PPC, MIPS: Improve XLOAD operand fusion and register hinting.
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@@ -187,7 +187,7 @@ static void asm_fusexref(ASMState *as, MIPSIns mi, Reg rt, IRRef ref,
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{
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IRIns *ir = IR(ref);
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Reg base;
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if (ra_noreg(ir->r) && mayfuse(as, ref)) {
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if (ra_noreg(ir->r) && canfuse(as, ir)) {
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if (ir->o == IR_ADD) {
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int32_t ofs2;
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if (irref_isk(ir->op2) && (ofs2 = ofs + IR(ir->op2)->i, checki16(ofs2))) {
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