DrSocalkwe3n/luajit
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

ARM, PPC, MIPS: Improve XLOAD operand fusion and register hinting.

Browse Source
This commit is contained in:
Mike Pall
2012-08-27 20:25:54 +02:00
parent 1e477e6487
commit 30f458fb4d
4 changed files with 9 additions and 5 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
src/lj_asm_ppc.h
View File

@@ -166,7 +166,7 @@ static void asm_fusexref(ASMState *as, PPCIns pi, Reg rt, IRRef ref,
{
IRIns *ir = IR(ref);
Reg base;
if (ra_noreg(ir->r) && mayfuse(as, ref)) {
if (ra_noreg(ir->r) && canfuse(as, ir)) {
if (ir->o == IR_ADD) {
int32_t ofs2;
if (irref_isk(ir->op2) && (ofs2 = ofs + IR(ir->op2)->i, checki16(ofs2))) {
@@ -214,7 +214,7 @@ static void asm_fusexrefx(ASMState *as, PPCIns pi, Reg rt, IRRef ref,
{
IRIns *ira = IR(ref);
Reg right, left;
if (mayfuse(as, ref) && ira->o == IR_ADD && ra_noreg(ira->r)) {
if (canfuse(as, ira) && ira->o == IR_ADD && ra_noreg(ira->r)) {
left = ra_alloc2(as, ira, allow);
right = (left >> 8); left &= 255;
} else {