Eliminate IR_FRAME. Replace with KGC and TRef/SnapEntry flags.
This commit is contained in:
67
src/lj_asm.c
67
src/lj_asm.c
@@ -931,7 +931,7 @@ static void asm_snap_alloc(ASMState *as)
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IRRef ref = snap_ref(map[n]);
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if (!irref_isk(ref)) {
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IRIns *ir = IR(ref);
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if (!ra_used(ir) && ir->o != IR_FRAME) {
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if (!ra_used(ir)) {
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RegSet allow = irt_isnum(ir->t) ? RSET_FPR : RSET_GPR;
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/* Not a var-to-invar ref and got a free register (or a remat)? */
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if ((!iscrossref(as, ref) || irt_isphi(ir->t)) &&
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@@ -2831,27 +2831,25 @@ static void asm_head_side(ASMState *as)
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/* Scan all parent SLOADs and collect register dependencies. */
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for (i = as->curins; i > REF_BASE; i--) {
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IRIns *ir = IR(i);
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lua_assert((ir->o == IR_SLOAD && (ir->op2 & IRSLOAD_PARENT)) ||
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ir->o == IR_FRAME);
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if (ir->o == IR_SLOAD) {
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RegSP rs = as->parentmap[ir->op1];
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if (ra_hasreg(ir->r)) {
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rset_clear(allow, ir->r);
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if (ra_hasspill(ir->s))
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ra_save(as, ir, ir->r);
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} else if (ra_hasspill(ir->s)) {
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irt_setmark(ir->t);
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pass2 = 1;
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}
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if (ir->r == rs) { /* Coalesce matching registers right now. */
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ra_free(as, ir->r);
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} else if (ra_hasspill(regsp_spill(rs))) {
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if (ra_hasreg(ir->r))
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pass3 = 1;
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} else if (ra_used(ir)) {
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sloadins[rs] = (IRRef1)i;
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rset_set(live, rs); /* Block live parent register. */
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}
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RegSP rs;
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lua_assert(ir->o == IR_SLOAD && (ir->op2 & IRSLOAD_PARENT));
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rs = as->parentmap[ir->op1];
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if (ra_hasreg(ir->r)) {
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rset_clear(allow, ir->r);
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if (ra_hasspill(ir->s))
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ra_save(as, ir, ir->r);
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} else if (ra_hasspill(ir->s)) {
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irt_setmark(ir->t);
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pass2 = 1;
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}
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if (ir->r == rs) { /* Coalesce matching registers right now. */
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ra_free(as, ir->r);
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} else if (ra_hasspill(regsp_spill(rs))) {
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if (ra_hasreg(ir->r))
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pass3 = 1;
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} else if (ra_used(ir)) {
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sloadins[rs] = (IRRef1)i;
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rset_set(live, rs); /* Block live parent register. */
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}
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}
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@@ -2979,8 +2977,7 @@ static void asm_tail_sync(ASMState *as)
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SnapEntry sn = map[n];
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if ((sn & SNAP_FRAME)) {
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IRIns *ir = IR(snap_ref(sn));
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GCfunc *fn = ir_kfunc(IR(ir->op2));
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lua_assert(ir->o == IR_FRAME && irt_isfunc(ir->t));
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GCfunc *fn = ir_kfunc(ir);
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if (isluafunc(fn)) {
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BCReg s = snap_slot(sn);
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BCReg fs = s + funcproto(fn)->framesize;
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@@ -3019,9 +3016,10 @@ static void asm_tail_sync(ASMState *as)
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/* Store the value of all modified slots to the Lua stack. */
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for (n = 0; n < nent; n++) {
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BCReg s = snap_slot(map[n]);
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SnapEntry sn = map[n];
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BCReg s = snap_slot(sn);
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int32_t ofs = 8*((int32_t)s-1);
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IRRef ref = snap_ref(map[n]);
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IRRef ref = snap_ref(sn);
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IRIns *ir = IR(ref);
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/* No need to restore readonly slots and unmodified non-parent slots. */
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if (ir->o == IR_SLOAD && ir->op1 == s &&
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@@ -3030,10 +3028,6 @@ static void asm_tail_sync(ASMState *as)
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if (irt_isnum(ir->t)) {
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Reg src = ra_alloc1(as, ref, RSET_FPR);
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emit_rmro(as, XO_MOVSDto, src, RID_BASE, ofs);
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} else if (ir->o == IR_FRAME) {
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emit_movmroi(as, RID_BASE, ofs, ptr2addr(ir_kgc(IR(ir->op2))));
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if (s != 0) /* Do not overwrite link to previous frame. */
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emit_movmroi(as, RID_BASE, ofs+4, (int32_t)(*--flinks));
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} else {
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lua_assert(irt_ispri(ir->t) || irt_isaddr(ir->t));
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if (!irref_isk(ref)) {
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@@ -3042,7 +3036,10 @@ static void asm_tail_sync(ASMState *as)
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} else if (!irt_ispri(ir->t)) {
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emit_movmroi(as, RID_BASE, ofs, ir->i);
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}
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emit_movmroi(as, RID_BASE, ofs+4, irt_toitype(ir->t));
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if (!(sn & (SNAP_CONT|SNAP_FRAME)))
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emit_movmroi(as, RID_BASE, ofs+4, irt_toitype(ir->t));
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else if (s != 0) /* Do not overwrite link to previous frame. */
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emit_movmroi(as, RID_BASE, ofs+4, (int32_t)(*--flinks));
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}
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checkmclim(as);
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}
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@@ -3110,10 +3107,6 @@ static void asm_ir(ASMState *as, IRIns *ir)
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case IR_ULE: asm_comp(as, ir, CC_A, CC_A, VCC_U); break;
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case IR_ABC:
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case IR_UGT: asm_comp(as, ir, CC_BE, CC_BE, VCC_U|VCC_PS); break;
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case IR_FRAME:
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if (ir->op1 == ir->op2) break; /* No check needed for placeholder. */
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/* fallthrough */
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case IR_EQ: asm_comp(as, ir, CC_NE, CC_NE, VCC_P); break;
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case IR_NE: asm_comp(as, ir, CC_E, CC_E, VCC_U|VCC_P); break;
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@@ -3272,10 +3265,6 @@ static void asm_setup_regsp(ASMState *as, Trace *T)
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}
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}
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break;
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case IR_FRAME:
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if (i == as->stopins+1 && ir->op1 == ir->op2)
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as->stopins++;
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break;
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case IR_CALLN: case IR_CALLL: case IR_CALLS: {
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const CCallInfo *ci = &lj_ir_callinfo[ir->op2];
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/* NYI: not fastcall-aware, but doesn't matter (yet). */
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