Add IR_KINT64.
This commit is contained in:
65
src/lj_asm.c
65
src/lj_asm.c
@@ -384,15 +384,23 @@ static void emit_loadi(ASMState *as, Reg r, int32_t i)
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emit_loadi(as, (r), ptr2addr((addr)))
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#if LJ_64
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/* mov r, imm64 */
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static void emit_loadu64(ASMState *as, Reg r, uint64_t i)
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/* mov r, imm64 or shorter 32 bit extended load. */
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static void emit_loadu64(ASMState *as, Reg r, uint64_t u64)
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{
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MCode *p = as->mcp;
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*(uint64_t *)(p-8) = i;
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p[-9] = (MCode)(XI_MOVri+(r&7));
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p[-10] = 0x48 + ((r>>3)&1);
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p -= 10;
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as->mcp = p;
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if (checku32(u64)) { /* 32 bit load clears upper 32 bits. */
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emit_loadi(as, r, (int32_t)u64);
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} else if (checki32((int64_t)u64)) { /* Sign-extended 32 bit load. */
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MCode *p = as->mcp;
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*(int32_t *)(p-4) = (int32_t)u64;
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as->mcp = emit_opm(XO_MOVmi, XM_REG, REX_64, r, p, -4);
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} else { /* Full-size 64 bit load. */
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MCode *p = as->mcp;
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*(uint64_t *)(p-8) = u64;
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p[-9] = (MCode)(XI_MOVri+(r&7));
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p[-10] = 0x48 + ((r>>3)&1);
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p -= 10;
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as->mcp = p;
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}
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}
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#endif
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@@ -618,6 +626,10 @@ static Reg ra_rematk(ASMState *as, IRIns *ir)
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} else if (ir->o == IR_KPRI) { /* REF_NIL stores ASMREF_L register. */
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lua_assert(irt_isnil(ir->t));
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emit_getgl(as, r, jit_L);
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#if LJ_64 /* NYI: 32 bit register pairs. */
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} else if (ir->o == IR_KINT64) {
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emit_loadu64(as, r, ir_kint64(ir)->u64);
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#endif
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} else {
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lua_assert(ir->o == IR_KINT || ir->o == IR_KGC ||
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ir->o == IR_KPTR || ir->o == IR_KNULL);
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@@ -909,6 +921,11 @@ static void ra_left(ASMState *as, Reg dest, IRRef lref)
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emit_loadn(as, dest, tv);
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return;
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}
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#if LJ_64 /* NYI: 32 bit register pairs. */
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} else if (ir->o == IR_KINT64) {
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emit_loadu64(as, dest, ir_kint64(ir)->u64);
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return;
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#endif
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} else {
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lua_assert(ir->o == IR_KINT || ir->o == IR_KGC ||
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ir->o == IR_KPTR || ir->o == IR_KNULL);
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@@ -1343,7 +1360,8 @@ static void asm_gencall(ASMState *as, const CCallInfo *ci, IRRef *args)
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lua_assert(!(nargs > 2 && (ci->flags&CCI_FASTCALL))); /* Avoid stack adj. */
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emit_call(as, ci->func);
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for (n = 0; n < nargs; n++) { /* Setup args. */
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IRIns *ir = IR(args[n]);
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IRRef ref = args[n];
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IRIns *ir = IR(ref);
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Reg r;
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#if LJ_64 && LJ_ABI_WIN
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/* Windows/x64 argument registers are strictly positional. */
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@@ -1364,38 +1382,42 @@ static void asm_gencall(ASMState *as, const CCallInfo *ci, IRRef *args)
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}
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#endif
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if (r) { /* Argument is in a register. */
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if (r < RID_MAX_GPR && args[n] < ASMREF_TMP1) {
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emit_loadi(as, r, ir->i);
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if (r < RID_MAX_GPR && ref < ASMREF_TMP1) {
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#if LJ_64 /* NYI: 32 bit register pairs. */
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if (ir->o == IR_KINT64)
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emit_loadu64(as, r, ir_kint64(ir)->u64);
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else
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#endif
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emit_loadi(as, r, ir->i);
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} else {
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lua_assert(rset_test(as->freeset, r)); /* Must have been evicted. */
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if (ra_hasreg(ir->r)) {
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ra_noweak(as, ir->r);
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ra_movrr(as, ir, r, ir->r);
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} else {
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ra_allocref(as, args[n], RID2RSET(r));
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ra_allocref(as, ref, RID2RSET(r));
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}
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}
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} else if (irt_isnum(ir->t)) { /* FP argument is on stack. */
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if (!LJ_64 && (ofs & 4) && irref_isk(args[n])) {
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if (LJ_32 && (ofs & 4) && irref_isk(ref)) {
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/* Split stores for unaligned FP consts. */
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emit_movmroi(as, RID_ESP, ofs, (int32_t)ir_knum(ir)->u32.lo);
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emit_movmroi(as, RID_ESP, ofs+4, (int32_t)ir_knum(ir)->u32.hi);
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} else {
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if ((allow & RSET_FPR) == RSET_EMPTY)
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lj_trace_err(as->J, LJ_TRERR_NYICOAL);
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r = ra_alloc1(as, args[n], allow & RSET_FPR);
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r = ra_alloc1(as, ref, allow & RSET_FPR);
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allow &= ~RID2RSET(r);
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emit_rmro(as, XO_MOVSDto, r, RID_ESP, ofs);
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}
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ofs += 8;
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} else { /* Non-FP argument is on stack. */
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/* NYI: no widening for 64 bit parameters on x64. */
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if (args[n] < ASMREF_TMP1) {
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if (LJ_32 && ref < ASMREF_TMP1) {
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emit_movmroi(as, RID_ESP, ofs, ir->i);
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} else {
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if ((allow & RSET_GPR) == RSET_EMPTY)
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lj_trace_err(as->J, LJ_TRERR_NYICOAL);
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r = ra_alloc1(as, args[n], allow & RSET_GPR);
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r = ra_alloc1(as, ref, allow & RSET_GPR);
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allow &= ~RID2RSET(r);
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emit_movtomro(as, REX_64IR(ir, r), RID_ESP, ofs);
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}
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@@ -1936,8 +1958,9 @@ static void asm_fstore(ASMState *as, IRIns *ir)
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/* The IRT_I16/IRT_U16 stores should never be simplified for constant
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** values since mov word [mem], imm16 has a length-changing prefix.
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*/
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lua_assert(!(irref_isk(ir->op2) && irt_is64(ir->t))); /* NYI: KINT64. */
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if (!irref_isk(ir->op2) || irt_isi16(ir->t) || irt_isu16(ir->t)) {
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if (!irref_isk(ir->op2) || irt_isi16(ir->t) || irt_isu16(ir->t) ||
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(LJ_64 && irt_is64(ir->t) &&
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!checki32((int64_t)ir_k64(IR(ir->op2))->u64))) {
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RegSet allow8 = (irt_isi8(ir->t) || irt_isu8(ir->t)) ? RSET_GPR8 : RSET_GPR;
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src = ra_alloc1(as, ir->op2, allow8);
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rset_clear(allow, src);
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@@ -2496,7 +2519,7 @@ static void asm_add(ASMState *as, IRIns *ir)
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if (irt_isnum(ir->t))
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asm_fparith(as, ir, XO_ADDSD);
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else if ((as->flags & JIT_F_LEA_AGU) || as->testmcp == as->mcp ||
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!asm_lea(as, ir))
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irt_is64(ir->t) || !asm_lea(as, ir))
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asm_intarith(as, ir, XOg_ADD);
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}
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@@ -2615,7 +2638,7 @@ static void asm_comp_(ASMState *as, IRIns *ir, int cc)
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else if ((cc & 0xa) == 0x2) cc ^= 5; /* A <-> B, AE <-> BE */
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lref = ir->op2; rref = ir->op1;
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}
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if (irref_isk(rref)) {
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if (irref_isk(rref) && IR(rref)->o != IR_KINT64) {
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IRIns *irl = IR(lref);
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int32_t imm = IR(rref)->i;
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/* Check wether we can use test ins. Not for unsigned, since CF=0. */
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