Record vararg expressions with varargs defined off-trace.
Add SLOAD variant to access the frame type/size.
This commit is contained in:
47
src/lj_asm.c
47
src/lj_asm.c
@@ -1110,23 +1110,34 @@ static int noconflict(ASMState *as, IRRef ref, IROp conflict)
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return 1; /* Ok, no conflict. */
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}
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/* Fuse array base into memory operand. */
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static IRRef asm_fuseabase(ASMState *as, IRRef ref)
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{
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IRIns *irb = IR(ref);
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as->mrm.ofs = 0;
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if (irb->o == IR_FLOAD) {
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IRIns *ira = IR(irb->op1);
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lua_assert(irb->op2 == IRFL_TAB_ARRAY);
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/* We can avoid the FLOAD of t->array for colocated arrays. */
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if (ira->o == IR_TNEW && ira->op1 <= LJ_MAX_COLOSIZE &&
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noconflict(as, irb->op1, IR_NEWREF)) {
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as->mrm.ofs = (int32_t)sizeof(GCtab); /* Ofs to colocated array. */
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return irb->op1; /* Table obj. */
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}
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} else if (irb->o == IR_ADD && irref_isk(irb->op2)) {
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/* Fuse base offset (vararg load). */
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as->mrm.ofs = IR(irb->op2)->i;
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return irb->op1;
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}
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return ref; /* Otherwise use the given array base. */
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}
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/* Fuse array reference into memory operand. */
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static void asm_fusearef(ASMState *as, IRIns *ir, RegSet allow)
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{
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IRIns *irb = IR(ir->op1);
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IRIns *ira, *irx;
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IRIns *irx;
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lua_assert(ir->o == IR_AREF);
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lua_assert(irb->o == IR_FLOAD && irb->op2 == IRFL_TAB_ARRAY);
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ira = IR(irb->op1);
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if (ira->o == IR_TNEW && ira->op1 <= LJ_MAX_COLOSIZE &&
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noconflict(as, irb->op1, IR_NEWREF)) {
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/* We can avoid the FLOAD of t->array for colocated arrays. */
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as->mrm.base = (uint8_t)ra_alloc1(as, irb->op1, allow); /* Table obj. */
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as->mrm.ofs = (int32_t)sizeof(GCtab); /* Ofs to colocated array. */
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} else {
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as->mrm.base = (uint8_t)ra_alloc1(as, ir->op1, allow); /* Array base. */
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as->mrm.ofs = 0;
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}
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as->mrm.base = (uint8_t)ra_alloc1(as, asm_fuseabase(as, ir->op1), allow);
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irx = IR(ir->op2);
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if (irref_isk(ir->op2)) {
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as->mrm.ofs += 8*irx->i;
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@@ -1277,10 +1288,10 @@ static Reg asm_fuseload(ASMState *as, IRRef ref, RegSet allow)
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} else if (mayfuse(as, ref)) {
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RegSet xallow = (allow & RSET_GPR) ? allow : RSET_GPR;
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if (ir->o == IR_SLOAD) {
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if (!irt_isint(ir->t) && !(ir->op2 & IRSLOAD_PARENT) &&
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noconflict(as, ref, IR_RETF)) {
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if ((!irt_isint(ir->t) || (ir->op2 & IRSLOAD_FRAME)) &&
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!(ir->op2 & IRSLOAD_PARENT) && noconflict(as, ref, IR_RETF)) {
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as->mrm.base = (uint8_t)ra_alloc1(as, REF_BASE, xallow);
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as->mrm.ofs = 8*((int32_t)ir->op1-1);
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as->mrm.ofs = 8*((int32_t)ir->op1-1) + ((ir->op2&IRSLOAD_FRAME)?4:0);
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as->mrm.idx = RID_NONE;
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return RID_MRM;
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}
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@@ -2031,7 +2042,7 @@ static void asm_ahustore(ASMState *as, IRIns *ir)
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static void asm_sload(ASMState *as, IRIns *ir)
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{
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int32_t ofs = 8*((int32_t)ir->op1-1);
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int32_t ofs = 8*((int32_t)ir->op1-1) + ((ir->op2 & IRSLOAD_FRAME) ? 4 : 0);
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IRType1 t = ir->t;
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Reg base;
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lua_assert(!(ir->op2 & IRSLOAD_PARENT)); /* Handled by asm_head_side(). */
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@@ -2056,7 +2067,7 @@ static void asm_sload(ASMState *as, IRIns *ir)
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Reg dest = ra_dest(as, ir, allow);
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base = ra_alloc1(as, REF_BASE, RSET_GPR);
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lua_assert(irt_isnum(t) || irt_isint(t) || irt_isaddr(t));
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if (irt_isint(t))
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if (irt_isint(t) && !(ir->op2 & IRSLOAD_FRAME))
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emit_rmro(as, XO_CVTSD2SI, dest, base, ofs);
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else if (irt_isnum(t))
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emit_rmro(as, XMM_MOVRM(as), dest, base, ofs);
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