MIPS64, part 2: Add MIPS64 hard-float JIT compiler backend.
Contributed by Djordje Kovacevic and Stefan Pejic from RT-RK.com. Sponsored by Cisco Systems, Inc.
This commit is contained in:
Mike Pall
@@ -327,7 +327,13 @@
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|.macro jmp_extern; jr CFUNCADDR; .endmacro
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|.macro hotcheck, delta, target
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| NYI
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| dsrl TMP1, PC, 1
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| andi TMP1, TMP1, 126
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| daddu TMP1, TMP1, DISPATCH
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| lhu TMP2, GG_DISP2HOT(TMP1)
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| addiu TMP2, TMP2, -delta
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| bltz TMP2, target
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|. sh TMP2, GG_DISP2HOT(TMP1)
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|.endmacro
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|.macro hotloop
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@@ -2150,7 +2156,21 @@ static void build_subroutines(BuildCtx *ctx)
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|//-----------------------------------------------------------------------
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|->vm_record: // Dispatch target for recording phase.
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| NYI
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|.if JIT
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| lbu TMP3, DISPATCH_GL(hookmask)(DISPATCH)
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| andi AT, TMP3, HOOK_VMEVENT // No recording while in vmevent.
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| bnez AT, >5
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| // Decrement the hookcount for consistency, but always do the call.
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|. lw TMP2, DISPATCH_GL(hookcount)(DISPATCH)
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| andi AT, TMP3, HOOK_ACTIVE
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| bnez AT, >1
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|. addiu TMP2, TMP2, -1
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| andi AT, TMP3, LUA_MASKLINE|LUA_MASKCOUNT
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| beqz AT, >1
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|. nop
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| b >1
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|. sw TMP2, DISPATCH_GL(hookcount)(DISPATCH)
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|.endif
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|->vm_rethook: // Dispatch target for return hooks.
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| lbu TMP3, DISPATCH_GL(hookmask)(DISPATCH)
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@@ -2201,7 +2221,25 @@ static void build_subroutines(BuildCtx *ctx)
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|. lw MULTRES, -24+LO(RB) // Restore MULTRES for *M ins.
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|->vm_hotloop: // Hot loop counter underflow.
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| NYI
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|.if JIT
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| ld LFUNC:TMP1, FRAME_FUNC(BASE)
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| daddiu CARG1, DISPATCH, GG_DISP2J
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| cleartp LFUNC:TMP1
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| sd PC, SAVE_PC
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| ld TMP1, LFUNC:TMP1->pc
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| move CARG2, PC
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| sd L, DISPATCH_J(L)(DISPATCH)
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| lbu TMP1, PC2PROTO(framesize)(TMP1)
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| load_got lj_trace_hot
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| sd BASE, L->base
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| dsll TMP1, TMP1, 3
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| daddu TMP1, BASE, TMP1
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| call_intern lj_trace_hot // (jit_State *J, const BCIns *pc)
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|. sd TMP1, L->top
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| b <3
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|. nop
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|.endif
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|->vm_callhook: // Dispatch target for call hooks.
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|.if JIT
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@@ -2235,21 +2273,69 @@ static void build_subroutines(BuildCtx *ctx)
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|->cont_stitch: // Trace stitching.
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|.if JIT
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| NYI
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| // RA = resultptr, RB = meta base
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| lw INS, -4(PC)
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| ld TRACE:TMP2, -40(RB) // Save previous trace.
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| decode_RA8a RC, INS
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| daddiu AT, MULTRES, -8
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| cleartp TRACE:TMP2
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| decode_RA8b RC
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| beqz AT, >2
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|. daddu RC, BASE, RC // Call base.
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|1: // Move results down.
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| ld CARG1, 0(RA)
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| daddiu AT, AT, -8
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| daddiu RA, RA, 8
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| sd CARG1, 0(RC)
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| bnez AT, <1
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|. daddiu RC, RC, 8
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|2:
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| decode_RA8a RA, INS
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| decode_RB8a RB, INS
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| decode_RA8b RA
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| decode_RB8b RB
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| daddu RA, RA, RB
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| daddu RA, BASE, RA
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|3:
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| sltu AT, RC, RA
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| bnez AT, >9 // More results wanted?
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|. nop
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| lhu TMP3, TRACE:TMP2->traceno
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| lhu RD, TRACE:TMP2->link
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| beq RD, TMP3, ->cont_nop // Blacklisted.
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|. load_got lj_dispatch_stitch
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| bnez RD, =>BC_JLOOP // Jump to stitched trace.
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|. sll RD, RD, 3
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| // Stitch a new trace to the previous trace.
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| sw TMP3, DISPATCH_J(exitno)(DISPATCH)
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| sd L, DISPATCH_J(L)(DISPATCH)
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| sd BASE, L->base
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| daddiu CARG1, DISPATCH, GG_DISP2J
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| call_intern lj_dispatch_stitch // (jit_State *J, const BCIns *pc)
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|. move CARG2, PC
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| b ->cont_nop
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|. ld BASE, L->base
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|9:
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| sd TISNIL, 0(RC)
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| b <3
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|. daddiu RC, RC, 8
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|.endif
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|->vm_profhook: // Dispatch target for profiler hook.
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#if LJ_HASPROFILE
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| load_got lj_dispatch_profile
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| sw MULTRES, SAVE_MULTRES
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| sd MULTRES, SAVE_MULTRES
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| move CARG2, PC
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| sw BASE, L->base
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| sd BASE, L->base
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| call_intern lj_dispatch_profile // (lua_State *L, const BCIns *pc)
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|. move CARG1, L
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| // HOOK_PROFILE is off again, so re-dispatch to dynamic instruction.
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| daddiu PC, PC, -4
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| b ->cont_nop
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|. lw BASE, L->base
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|. ld BASE, L->base
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#endif
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|//-----------------------------------------------------------------------
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@@ -2259,6 +2345,7 @@ static void build_subroutines(BuildCtx *ctx)
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|.macro savex_, a, b
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|.if FPU
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| sdc1 f..a, a*8(sp)
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| sdc1 f..b, b*8(sp)
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| sd r..a, 32*8+a*8(sp)
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| sd r..b, 32*8+b*8(sp)
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|.else
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@@ -2269,11 +2356,124 @@ static void build_subroutines(BuildCtx *ctx)
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|->vm_exit_handler:
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|.if JIT
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| NYI
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|.if FPU
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| daddiu sp, sp, -(32*8+32*8)
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|.else
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| daddiu sp, sp, -(32*8)
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|.endif
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| savex_ 0, 1
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| savex_ 2, 3
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| savex_ 4, 5
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| savex_ 6, 7
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| savex_ 8, 9
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| savex_ 10, 11
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| savex_ 12, 13
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| savex_ 14, 15
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| savex_ 16, 17
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| savex_ 18, 19
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| savex_ 20, 21
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| savex_ 22, 23
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| savex_ 24, 25
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| savex_ 26, 27
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| savex_ 28, 30
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|.if FPU
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| sdc1 f29, 29*8(sp)
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| sdc1 f31, 31*8(sp)
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| sd r0, 32*8+31*8(sp) // Clear RID_TMP.
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| daddiu TMP2, sp, 32*8+32*8 // Recompute original value of sp.
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| sd TMP2, 32*8+29*8(sp) // Store sp in RID_SP
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|.else
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| sd r0, 31*8(sp) // Clear RID_TMP.
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| daddiu TMP2, sp, 32*8 // Recompute original value of sp.
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| sd TMP2, 29*8(sp) // Store sp in RID_SP
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|.endif
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| li_vmstate EXIT
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| daddiu DISPATCH, JGL, -GG_DISP2G-32768
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| lw TMP1, 0(TMP2) // Load exit number.
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| st_vmstate
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| ld L, DISPATCH_GL(cur_L)(DISPATCH)
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| ld BASE, DISPATCH_GL(jit_base)(DISPATCH)
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| load_got lj_trace_exit
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| sd L, DISPATCH_J(L)(DISPATCH)
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| sw ra, DISPATCH_J(parent)(DISPATCH) // Store trace number.
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| sd BASE, L->base
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| sw TMP1, DISPATCH_J(exitno)(DISPATCH) // Store exit number.
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| daddiu CARG1, DISPATCH, GG_DISP2J
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| sd r0, DISPATCH_GL(jit_base)(DISPATCH)
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| call_intern lj_trace_exit // (jit_State *J, ExitState *ex)
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|. move CARG2, sp
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| // Returns MULTRES (unscaled) or negated error code.
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| ld TMP1, L->cframe
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| li AT, -4
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| ld BASE, L->base
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| and sp, TMP1, AT
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| ld PC, SAVE_PC // Get SAVE_PC.
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| b >1
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|. sd L, SAVE_L // Set SAVE_L (on-trace resume/yield).
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|.endif
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|->vm_exit_interp:
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|.if JIT
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| NYI
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| // CRET1 = MULTRES or negated error code, BASE, PC and JGL set.
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| ld L, SAVE_L
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| daddiu DISPATCH, JGL, -GG_DISP2G-32768
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| sd BASE, L->base
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|1:
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| bltz CRET1, >9 // Check for error from exit.
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|. ld LFUNC:RB, FRAME_FUNC(BASE)
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| .FPU lui TMP3, 0x59c0 // TOBIT = 2^52 + 2^51 (float).
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| dsll MULTRES, CRET1, 3
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| cleartp LFUNC:RB
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| sd MULTRES, SAVE_MULTRES
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| li TISNIL, LJ_TNIL
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| li TISNUM, LJ_TISNUM // Setup type comparison constants.
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| .FPU mtc1 TMP3, TOBIT
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| ld TMP1, LFUNC:RB->pc
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| sd r0, DISPATCH_GL(jit_base)(DISPATCH)
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| ld KBASE, PC2PROTO(k)(TMP1)
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| .FPU cvt.d.s TOBIT, TOBIT
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| // Modified copy of ins_next which handles function header dispatch, too.
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| lw INS, 0(PC)
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| daddiu PC, PC, 4
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| // Assumes TISNIL == ~LJ_VMST_INTERP == -1
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| sw TISNIL, DISPATCH_GL(vmstate)(DISPATCH)
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| decode_OP8a TMP1, INS
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| decode_OP8b TMP1
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| sltiu TMP2, TMP1, BC_FUNCF*8
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| daddu TMP0, DISPATCH, TMP1
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| decode_RD8a RD, INS
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| ld AT, 0(TMP0)
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| decode_RA8a RA, INS
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| beqz TMP2, >2
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|. decode_RA8b RA
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| jr AT
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|. decode_RD8b RD
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|2:
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| sltiu TMP2, TMP1, (BC_FUNCC+2)*8 // Fast function?
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| bnez TMP2, >3
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|. ld TMP1, FRAME_PC(BASE)
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| // Check frame below fast function.
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| andi TMP0, TMP1, FRAME_TYPE
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| bnez TMP0, >3 // Trace stitching continuation?
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|. nop
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| // Otherwise set KBASE for Lua function below fast function.
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| lw TMP2, -4(TMP1)
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| decode_RA8a TMP0, TMP2
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| decode_RA8b TMP0
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| dsubu TMP1, BASE, TMP0
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| ld LFUNC:TMP2, -32(TMP1)
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| cleartp LFUNC:TMP2
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| ld TMP1, LFUNC:TMP2->pc
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| ld KBASE, PC2PROTO(k)(TMP1)
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|3:
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| daddiu RC, MULTRES, -8
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| jr AT
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|. daddu RA, RA, BASE
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|9: // Rethrow error from the right C frame.
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| load_got lj_err_throw
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| negu CARG2, CRET1
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| call_intern lj_err_throw // (lua_State *L, int errcode)
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|. move CARG1, L
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|.endif
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|//-----------------------------------------------------------------------
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@@ -4013,7 +4213,7 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
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| ins_next2
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|7: // Possible table write barrier for the value. Skip valiswhite check.
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| barrierback TAB:RB, TMP3, TMP0, <2
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| barrierback TAB:CARG2, TMP3, TMP0, <2
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break;
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case BC_TSETM:
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@@ -4632,7 +4832,18 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
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case BC_JLOOP:
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|.if JIT
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| NYI
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| // RA = base*8 (ignored), RD = traceno*8
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| ld TMP1, DISPATCH_J(trace)(DISPATCH)
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| li AT, 0
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| daddu TMP1, TMP1, RD
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| // Traces on MIPS don't store the trace number, so use 0.
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| sd AT, DISPATCH_GL(vmstate)(DISPATCH)
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| ld TRACE:TMP2, 0(TMP1)
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| sd BASE, DISPATCH_GL(jit_base)(DISPATCH)
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| ld TMP2, TRACE:TMP2->mcode
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| sd L, DISPATCH_GL(tmpbuf.L)(DISPATCH)
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| jr TMP2
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|. daddiu JGL, DISPATCH, GG_DISP2G+32768
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|.endif
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break;
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@@ -4694,10 +4905,12 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
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case BC_IFUNCV:
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| // BASE = new base, RA = BASE+framesize*8, RB = LFUNC, RC = nargs*8
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| li TMP0, LJ_TFUNC
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| daddu TMP1, BASE, RC
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| ld TMP2, L->maxstack
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| settp LFUNC:RB, TMP0
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| daddu TMP0, RA, RC
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| sd LFUNC:RB, 0(TMP1) // Store (untagged) copy of LFUNC.
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| sd LFUNC:RB, 0(TMP1) // Store (tagged) copy of LFUNC.
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| daddiu TMP3, RC, 16+FRAME_VARG
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| sltu AT, TMP0, TMP2
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| ld KBASE, -4+PC2PROTO(k)(PC)
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