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ARM64: Improve IR_OBAR code generation.

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Thanks to Peter Cawley. #1070
This commit is contained in:
Mike Pall
2023-09-09 17:21:32 +02:00
parent c2bdce399e
commit c1877e648a
1 changed files with 3 additions and 5 deletions
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6
src/lj_asm_arm64.h
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@@ -1283,7 +1283,6 @@ static void asm_obar(ASMState *as, IRIns *ir)
const CCallInfo *ci = &lj_ir_callinfo[IRCALL_lj_gc_barrieruv]; const CCallInfo *ci = &lj_ir_callinfo[IRCALL_lj_gc_barrieruv];
IRRef args[2]; IRRef args[2];
MCLabel l_end; MCLabel l_end;
RegSet allow = RSET_GPR;
Reg obj, val, tmp; Reg obj, val, tmp;
/* No need for other object barriers (yet). */ /* No need for other object barriers (yet). */
lj_assertA(IR(ir->op1)->o == IR_UREFC, "bad OBAR type"); lj_assertA(IR(ir->op1)->o == IR_UREFC, "bad OBAR type");
@@ -1294,9 +1293,8 @@ static void asm_obar(ASMState *as, IRIns *ir)
asm_gencall(as, ci, args); asm_gencall(as, ci, args);
emit_dm(as, A64I_MOVx, ra_releasetmp(as, ASMREF_TMP1), RID_GL); emit_dm(as, A64I_MOVx, ra_releasetmp(as, ASMREF_TMP1), RID_GL);
obj = IR(ir->op1)->r; obj = IR(ir->op1)->r;
tmp = ra_scratch(as, rset_exclude(allow, obj)); tmp = ra_scratch(as, rset_exclude(RSET_GPR, obj));
emit_cond_branch(as, CC_EQ, l_end); emit_tnb(as, A64I_TBZ, tmp, lj_ffs(LJ_GC_BLACK), l_end);
emit_n(as, A64I_TSTw^emit_isk13(LJ_GC_BLACK, 0), tmp);
emit_cond_branch(as, CC_EQ, l_end); emit_cond_branch(as, CC_EQ, l_end);
emit_n(as, A64I_TSTw^emit_isk13(LJ_GC_WHITES, 0), RID_TMP); emit_n(as, A64I_TSTw^emit_isk13(LJ_GC_WHITES, 0), RID_TMP);
val = ra_alloc1(as, ir->op2, rset_exclude(RSET_GPR, obj)); val = ra_alloc1(as, ir->op2, rset_exclude(RSET_GPR, obj));