Clean up RegSP handling for parent link instructions.
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@@ -318,27 +318,37 @@ static RegSP snap_renameref(GCtrace *T, SnapNo lim, IRRef ref, RegSP rs)
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return rs;
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}
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/* Convert a snapshot into a linear slot -> RegSP map.
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** Note: unused slots are not initialized!
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*/
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void lj_snap_regspmap(uint16_t *rsmap, GCtrace *T, SnapNo snapno, int hi)
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/* Copy RegSP from parent snapshot to the parent links of the IR. */
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IRIns *lj_snap_regspmap(GCtrace *T, SnapNo snapno, IRIns *ir)
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{
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SnapShot *snap = &T->snap[snapno];
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MSize n, nent = snap->nent;
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SnapEntry *map = &T->snapmap[snap->mapofs];
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BloomFilter rfilt = snap_renamefilter(T, snapno);
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for (n = 0; n < nent; n++) {
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SnapEntry sn = map[n];
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IRRef ref = snap_ref(sn);
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if (!irref_isk(ref) &&
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((LJ_SOFTFP && hi) ? (ref++, (sn & SNAP_SOFTFPNUM)) : 1)) {
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IRIns *ir = &T->ir[ref];
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uint32_t rs = ir->prev;
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if (bloomtest(rfilt, ref))
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rs = snap_renameref(T, snapno, ref, rs);
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rsmap[snap_slot(sn)] = (uint16_t)rs;
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MSize n = 0;
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IRRef ref = 0;
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for ( ; ; ir++) {
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uint32_t rs;
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if (ir->o == IR_SLOAD) {
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if (!(ir->op2 & IRSLOAD_PARENT)) break;
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for ( ; ; n++) {
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lua_assert(n < snap->nent);
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if (snap_slot(map[n]) == ir->op1) {
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ref = snap_ref(map[n++]);
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break;
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}
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}
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} else if (LJ_SOFTFP && ir->o == IR_HIOP) {
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ref++;
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} else {
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break;
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}
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rs = T->ir[ref].prev;
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if (bloomtest(rfilt, ref))
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rs = snap_renameref(T, snapno, ref, rs);
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ir->prev = (uint16_t)rs;
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lua_assert(regsp_used(rs));
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}
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return ir;
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}
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/* Restore a value from the trace exit state. */
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