MIPS64, part 1: Add MIPS64 support to interpreter.
Contributed by Djordje Kovacevic and Stefan Pejic from RT-RK.com. Sponsored by Cisco Systems, Inc.
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@@ -510,7 +510,7 @@ static void asm_conv(ASMState *as, IRIns *ir)
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Reg left = ra_alloc1(as, ir->op1, RSET_GPR);
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lua_assert(irt_isint(ir->t) || irt_isu32(ir->t));
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if ((ir->op2 & IRCONV_SEXT)) {
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if ((as->flags & JIT_F_MIPS32R2)) {
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if ((as->flags & JIT_F_MIPSXXR2)) {
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emit_dst(as, st == IRT_I8 ? MIPSI_SEB : MIPSI_SEH, dest, 0, left);
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} else {
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uint32_t shift = st == IRT_I8 ? 24 : 16;
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@@ -739,7 +739,7 @@ static void asm_href(ASMState *as, IRIns *ir, IROp merge)
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emit_dst(as, MIPSI_SUBU, tmp2, tmp2, dest);
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if (LJ_SOFTFP ? (irkey[1].o == IR_HIOP) : irt_isnum(kt)) {
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emit_dst(as, MIPSI_XOR, tmp2, tmp2, tmp1);
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if ((as->flags & JIT_F_MIPS32R2)) {
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if ((as->flags & JIT_F_MIPSXXR2)) {
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emit_dta(as, MIPSI_ROTR, dest, tmp1, (-HASH_ROT1)&31);
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} else {
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emit_dst(as, MIPSI_OR, dest, dest, tmp1);
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@@ -1457,7 +1457,7 @@ static void asm_bswap(ASMState *as, IRIns *ir)
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{
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Reg dest = ra_dest(as, ir, RSET_GPR);
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Reg left = ra_alloc1(as, ir->op1, RSET_GPR);
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if ((as->flags & JIT_F_MIPS32R2)) {
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if ((as->flags & JIT_F_MIPSXXR2)) {
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emit_dta(as, MIPSI_ROTR, dest, RID_TMP, 16);
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emit_dst(as, MIPSI_WSBH, RID_TMP, 0, left);
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} else {
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@@ -1513,7 +1513,7 @@ static void asm_bitshift(ASMState *as, IRIns *ir, MIPSIns mi, MIPSIns mik)
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static void asm_bror(ASMState *as, IRIns *ir)
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{
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if ((as->flags & JIT_F_MIPS32R2)) {
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if ((as->flags & JIT_F_MIPSXXR2)) {
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asm_bitshift(as, ir, MIPSI_ROTRV, MIPSI_ROTR);
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} else {
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Reg dest = ra_dest(as, ir, RSET_GPR);
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