Add IR_XSTORE.
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13
src/lj_asm.c
13
src/lj_asm.c
@@ -1357,7 +1357,8 @@ static Reg asm_fuseload(ASMState *as, IRRef ref, RegSet allow)
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/* Generic fusion is only ok for 32 bit operand (but see asm_comp).
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** Fusing unaligned memory operands is ok on x86 (except for SIMD types).
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*/
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if (irt_isint(ir->t) || irt_isaddr(ir->t)) {
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if ((irt_isint(ir->t) || irt_isaddr(ir->t)) &&
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noconflict(as, ref, IR_XSTORE)) {
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asm_fusexref(as, IR(ir->op1), xallow);
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return RID_MRM;
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}
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@@ -1978,7 +1979,7 @@ static void asm_fxload(ASMState *as, IRIns *ir)
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emit_mrm(as, xo, dest, RID_MRM);
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}
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static void asm_fstore(ASMState *as, IRIns *ir)
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static void asm_fxstore(ASMState *as, IRIns *ir)
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{
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RegSet allow = RSET_GPR;
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Reg src = RID_NONE;
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@@ -1991,7 +1992,11 @@ static void asm_fstore(ASMState *as, IRIns *ir)
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src = ra_alloc1(as, ir->op2, allow8);
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rset_clear(allow, src);
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}
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asm_fusefref(as, IR(ir->op1), allow);
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if (ir->o == IR_FSTORE)
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asm_fusefref(as, IR(ir->op1), allow);
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else
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asm_fusexref(as, IR(ir->op1), allow);
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/* ir->op2 is ignored -- unaligned stores are ok on x86. */
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if (ra_hasreg(src)) {
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x86Op xo;
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switch (irt_type(ir->t)) {
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@@ -3467,7 +3472,7 @@ static void asm_ir(ASMState *as, IRIns *ir)
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case IR_SLOAD: asm_sload(as, ir); break;
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case IR_ASTORE: case IR_HSTORE: case IR_USTORE: asm_ahustore(as, ir); break;
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case IR_FSTORE: asm_fstore(as, ir); break;
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case IR_FSTORE: case IR_XSTORE: asm_fxstore(as, ir); break;
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/* Allocations. */
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case IR_SNEW: asm_snew(as, ir); break;
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